API Reference
Four-lane 32-bit float vector. `new Vec4f(x, y, z, w)` takes exactly four `Float` lanes in x/y/z/w order and packs them into one 128-bit register value. Anything else, including a mix of `Float` and `Int`, is E108. Each lane is stored as a 32-bit float, so values outside the `f32` range become infinity, and `+ - * /` run per lane with IEEE-754 rules: a division by a zero lane yields infinity or NaN instead of faulting. Vectors pass to and from functions by value, like `Int` or `Float`. Use `min()`, `max()`, `sqrt()`, and `dot()` for the lane-wise and horizontal math this type adds on top of the four operators.
fn dot(other: Vec4f): FloatProducts of matching lanes summed into one scalar.
other — right-hand vector.
returns — x*other.x + y*other.y + z*other.z + w*other.w, computed in 32-bit floats, so the result keeps about 7 decimal digits.
import { Vec4f } from "@std/simd";
let d = new Vec4f(1.0, 2.0, 3.0, 4.0).dot(new Vec4f(2.0, 3.0, 4.0, 5.0));
print(d == 40.0);fn get(lane: Int): FloatLane picked at run time, for indices a loop or an array supplies.
lane — lane index, 0 (x) through 3 (w).
returns — the selected lane, widened from 32-bit float to `Float`. Keep the index inside 0..3: a wider index stops the interpreter with `vector lane N out of range`, and compiled backends hand back an unspecified lane instead.
import { Vec4f } from "@std/simd";
let v = new Vec4f(1.0, 2.0, 3.0, 4.0);
let sum = 0.0;
let i = 0;
while i < 4 {
sum = sum + v.get(i);
i = i + 1;
}
print(sum == 10.0);fn max(other: Vec4f): Vec4fLarger lane of each pair.
other — right-hand vector.
returns — a new vector of per-lane maxima. Equal lanes keep that value. A NaN lane splits the backends: the interpreter and LLVM return the other lane, Cranelift returns NaN.
import { Vec4f } from "@std/simd";
let h = new Vec4f(1.0, 5.0, 3.0, 4.0).max(new Vec4f(4.0, 2.0, 6.0, 0.0));
print(h.x() == 4.0, h.y() == 5.0, h.z() == 6.0, h.w() == 4.0);fn min(other: Vec4f): Vec4fSmaller lane of each pair.
other — right-hand vector.
returns — a new vector of per-lane minima. Equal lanes keep that value. A NaN lane splits the backends: the interpreter and LLVM return the other lane, Cranelift returns NaN.
import { Vec4f } from "@std/simd";
let m = new Vec4f(1.0, 5.0, 3.0, 4.0).min(new Vec4f(4.0, 2.0, 6.0, 0.0));
print(m.x() == 1.0, m.y() == 2.0, m.z() == 3.0, m.w() == 0.0);fn splat(val: Float): Vec4fBroadcast one value to all four lanes.
val — lane value, narrowed to a 32-bit float.
returns — vector with every lane set to val.
import { Vec4f } from "@std/simd";
let v = Vec4f.splat(2.0);
print(v.x() == 2.0, v.w() == 2.0);fn sqrt(): Vec4fSquare root of every lane.
returns — a new vector with sqrt applied per lane; negative lanes become NaN per IEEE-754.
import { Vec4f } from "@std/simd";
let r = new Vec4f(4.0, 9.0, 16.0, 25.0).sqrt();
print(r.x() == 2.0, r.z() == 4.0);fn w(): FloatLane 3.
returns — the w lane, widened from 32-bit float to `Float`.
fn x(): FloatLane 0.
returns — the x lane, widened from 32-bit float to `Float`.
import { Vec4f } from "@std/simd";
print(new Vec4f(1.0, 2.0, 3.0, 4.0).x() == 1.0);fn y(): FloatLane 1.
returns — the y lane, widened from 32-bit float to `Float`.
import { Vec4f } from "@std/simd";
print(new Vec4f(1.0, 2.0, 3.0, 4.0).y() == 2.0);fn z(): FloatLane 2.
returns — the z lane, widened from 32-bit float to `Float`.
Four-lane 32-bit integer vector. `new Vec4i(x, y, z, w)` takes exactly four `Int` lanes in x/y/z/w order and packs them into one 128-bit register value; anything else is E108. Lanes are signed 32-bit, so a wider lane keeps only its low 32 bits and `+ - * /` wrap inside the signed 32-bit range instead of growing. Division truncates toward zero. A zero lane in the divisor is not portable: the interpreter stops with `division by zero`, Cranelift traps, and LLVM returns an unspecified value, so test divisors before dividing. `min()`, `max()`, `dot()`, and `sqrt()` belong to `Vec4f`; calling one on a `Vec4i` is E108. Extract lanes with `x()`/`y()`/`z()`/`w()`/`get()` and compare those when an integer lane-wise choice is needed. Reading a lane widens its 32 bits to `Int`, and negative lanes do not agree across backends: the interpreter sign-extends, so a lane of -1 reads back as -1, while the Cranelift and LLVM backends zero-extend and read it back as 4294967295. Keep lanes non-negative, or normalize what you read, when one result has to hold everywhere.
fn get(lane: Int): IntLane picked at run time, for indices a loop or an array supplies.
lane — lane index, 0 (x) through 3 (w).
returns — the selected lane widened from 32 bits to `Int`. Two edges are backend dependent: an index outside 0..3 stops the interpreter with `vector lane N out of range` and returns an unspecified lane once compiled, and a negative lane sign-extends under the interpreter but zero-extends under Cranelift and LLVM, so -1 reads back as -1 or 4294967295.
import { Vec4i } from "@std/simd";
let v = new Vec4i(1, 2, 3, 4);
let sum = 0;
let i = 0;
while i < 4 {
sum = sum + v.get(i);
i = i + 1;
}
print(sum == 10);fn splat(val: Int): Vec4iBroadcast one value to all four lanes.
val — lane value, truncated to a signed 32-bit int.
returns — vector with every lane set to val.
import { Vec4i } from "@std/simd";
let v = Vec4i.splat(7);
print(v.y() == 7, v.get(3) == 7);fn w(): IntLane 3.
returns — the w lane as an `Int`; a negative lane widens per backend, see get().
fn x(): IntLane 0.
returns — the x lane as an `Int`; a negative lane widens per backend, see get().
fn y(): IntLane 1.
returns — the y lane as an `Int`; a negative lane widens per backend, see get().
fn z(): IntLane 2.
returns — the z lane as an `Int`; a negative lane widens per backend, see get().